← Home

EXTR

Extract register

This instruction extracts a register from a pair of registers.

This instruction is used by the alias ROR (immediate).

313029282726252423222120191817161514131211109876543210
sf00100111N0RmimmsRnRd
op21o0

32-bit encoding

(sf == 0 && N == 0 && imms == 0xxxxx)

EXTR <Wd>, <Wn>, <Wm>, #<lsb>

64-bit encoding

(sf == 1 && N == 1)

EXTR <Xd>, <Xn>, <Xm>, #<lsb>

Decode (all encodings)

if N != sf then EndOfDecode(Decode_UNDEF); end; if sf == '0' && imms[5] == '1' then EndOfDecode(Decode_UNDEF); end; let d : integer{} = UInt(Rd); let n : integer{} = UInt(Rn); let m : integer{} = UInt(Rm); let datasize : integer{} = 32 << UInt(sf); let lsb : integer{} = UInt(imms);

Assembler Symbols

<Wd>

Is the 32-bit name of the general-purpose destination register, encoded in the "Rd" field.

<Wn>

Is the 32-bit name of the first general-purpose source register, encoded in the "Rn" field.

<Wm>

Is the 32-bit name of the second general-purpose source register, encoded in the "Rm" field.

<lsb>

For the "32-bit" variant: is the least significant bit position from which to extract, in the range 0 to 31, encoded in the "imms" field.

For the "64-bit" variant: is the least significant bit position from which to extract, in the range 0 to 63, encoded in the "imms" field.

<Xd>

Is the 64-bit name of the general-purpose destination register, encoded in the "Rd" field.

<Xn>

Is the 64-bit name of the first general-purpose source register, encoded in the "Rn" field.

<Xm>

Is the 64-bit name of the second general-purpose source register, encoded in the "Rm" field.

Alias Conditions

AliasIs preferred when
ROR (immediate)Rn == Rm

Operation

var result : bits(datasize); let operand1 : bits(datasize) = X{}(n); let operand2 : bits(datasize) = X{}(m); let concat : bits(2*datasize) = operand1::operand2; result = concat[(lsb+datasize)-1:lsb]; X{datasize}(d) = result;

Operational information

This instruction is a data-independent-time instruction as described in About PSTATE.DIT.


Version 2026.06 — Copyright © 2010-2026 Arm Limited or its affiliates.

This site is provided as a community resource and is NOT affiliated with nor endorsed by Arm Limited.