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SYSL

System instruction with result

For more information, see op0 == 0b01, cache maintenance, TLB maintenance, address translation, prediction restriction, BRBE, Trace Extension, and Guarded Control Stack instructions for the encodings of System instructions.

This instruction is used by the aliases GCSPOPM, GCSSS2, and GICR.

313029282726252423222120191817161514131211109876543210
1101010100101op1CRnCRmop2Rt
L

Encoding

SYSL <Xt>, #<op1>, <Cn>, <Cm>, #<op2>

Decode

let t : integer = UInt(Rt); let sys_L : bits(1) = L; let sys_op0 : bits(2) = '01'; let sys_op1 : bits(3) = op1; let sys_op2 : bits(3) = op2; let sys_crn : bits(4) = CRn; let sys_crm : bits(4) = CRm;

Assembler Symbols

<Xt>

Is the 64-bit name of the general-purpose destination register, encoded in the "Rt" field.

<op1>

Is a 3-bit unsigned immediate, in the range 0 to 7, encoded in the "op1" field.

<Cn>

Is a name 'Cn', with 'n' in the range 0 to 15, encoded in the "CRn" field.

<Cm>

Is a name 'Cm', with 'm' in the range 0 to 15, encoded in the "CRm" field.

<op2>

Is a 3-bit unsigned immediate, in the range 0 to 7, encoded in the "op2" field.

Alias Conditions

AliasIs preferred when
GCSPOPMop1 == '011' && CRn == '0111' && CRm == '0111' && op2 == '001'
GCSSS2op1 == '011' && CRn == '0111' && CRm == '0111' && op2 == '011'
GICRop1 == '000' && CRn == '1100' && CRm == '0011' && SysLOp('000', '1100', '0011', op2) == Sysl_GICR

Operation

AArch64_SysInstrWithResult(sys_op0, sys_op1, sys_crn, sys_crm, sys_op2, t);

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